Chapter 7 — Rectifiers and converters

Everything in Module 2 comes together here. We take the sources of Chapter 4, the switching devices of Chapter 5, and the numerical care of Chapter 6, and build the converters that dominate modern grids: a half-wave rectifier, a full-bridge rectifier, a buck DC-DC converter, and finally a closed-loop power controller that uses all of it at once. For each we will predict a number by hand and then read it off the simulator — the Module 1 habit — so you finish the module able to check a power-electronic waveform, not just watch it.

Learning objectives

By the end of this chapter you should be able to:

• Explain how a reservoir capacitor smooths a rectified waveform, and estimate the output ripple from $R$, $C$, and the ripple frequency.
• Say why a full bridge ripples at twice the line frequency and is easier to smooth than a half-wave stage.
• Derive the buck converter's output as $V_{\text{out}}=D{V}_{\text{in}}$ from inductor volt-second balance, and estimate its current ripple.
• Read conduction intervals, ripple, and average quantities off a converter, and explain how a closed loop holds an output at a setpoint.

7.1 The half-wave rectifier

A single diode plus a reservoir capacitor is the simplest AC-to-DC stage.

Half-wave rectifier: one diode passes the positive half-cycles of a $10\mathrm{V}$ (RMS) $60\mathrm{Hz}$ source into a $100\mu \mathrm{F}$ capacitor and a $200\mathrm{\Omega }$ load. $V_{\mathrm{ac}}$ is the source; $V_{\mathrm{dc}}$ the smoothed output.

The diode conducts only near each positive peak (Chapter 5), recharging the capacitor toward the source peak; for the rest of the cycle it blocks and the load drains the capacitor with time constant

$$\tau =RC=(200)(100\times {10}^{-6})=20\text{ms}.$$

The source is $10\text{V}$ RMS, so its peak is $V_{\text{pk}}=10\sqrt{2}\approx 14.14\text{V}$ (Chapter 4). The line period is $T=1/60\approx 16.7\text{ms}$. Because $\tau =20\text{ms}$ is only a little longer than $T$, the capacitor sags a lot between peaks — this is a large-ripple design. A standard estimate of the peak-to-peak ripple of a capacitor-input filter is

$$\mathrm{\Delta }{V}_{\text{pp}}\approx \frac{I_{\text{load}}}{f_{\text{ripple}}C}=\frac{V_{\text{dc}}}{R{f}_{\text{ripple}}C}.$$

With a mean $V_{\text{dc}}\approx 9\text{V}$ and $f_{\text{ripple}}=60\text{Hz}$ (one charging pulse per line cycle),

$$\mathrm{\Delta }{V}_{\text{pp}}\approx \frac{9}{(200)(60)(100\times {10}^{-6})}\approx 7.5\text{V}.$$

Now run it and compare. The simulator reports Vdc riding between about $6.7\text{V}$ and $13.4\text{V}$ (a mean near $9.4\text{V}$) — a peak-to-peak ripple of roughly $6.6\text{V}$, in the ballpark of our estimate. The estimate runs a little high because it assumes the capacitor discharges for the whole period, whereas the diode reconducts slightly before a full period elapses. The lesson is that a half-wave stage is a rough DC source.

7.2 The full-bridge (Graetz) rectifier

Four diodes arranged in a bridge steer both half-cycles of the source to the load with the same polarity.

Full-bridge rectifier: four diodes route both halves of a $120\mathrm{V}$ (RMS) $60\mathrm{Hz}$ source into a $100\mu \mathrm{F}$ reservoir and a $1\mathrm{k}\mathrm{\Omega }$ load, so the output ripples at $120\mathrm{Hz}$.

Two things change versus half-wave. First, both half-cycles are used, so the output is refreshed twice per line cycle — the ripple frequency is $f_{\text{ripple}}=2f=120\text{Hz}$, and the gap to bridge is only $8.3\text{ms}$. Second, this sample uses a much stiffer filter relative to the load:

$$\tau =RC=(1000)(100\times {10}^{-6})=100\text{ms}\gg 8.3\text{ms}.$$

The source is $120\text{V}$ RMS, peak $120\sqrt{2}\approx 169.7\text{V}$. The ripple estimate is now

$$\mathrm{\Delta }{V}_{\text{pp}}\approx \frac{V_{\text{dc}}}{R(2f)C}\approx \frac{164}{(1000)(120)(100\times {10}^{-6})}\approx 13.7\text{V}.$$

Run it: the simulator holds Vdc between about $157.8\text{V}$ and $169.7\text{V}$ (mean $\approx 164\text{V}$), a ripple near $12\text{V}$ — close to the estimate, and only ~7% of the DC level. Halving the gap ($120\text{Hz}$ vs $60\text{Hz}$) and using a five-times-larger $\tau$ is why the bridge output is so much flatter than the half-wave one. This is why bridges dominate real supplies.

7.3 The buck (step-down) converter

Rectifiers turn AC into DC. A buck converter turns a DC voltage into a lower, adjustable DC voltage, by chopping and averaging.

Switch-node averaging in a buck converter. The IGBT chops the input so the switch-node voltage $V_m$ is a square wave between $V_{\mathrm{in}}$ and $0$; the inductor's volt-second balance forces the L-C filter to pass its average, $⟨V_m⟩=D{V}_{\mathrm{in}}$, to the output.

An IGBT connects the switch node $V_m$ to the $12\text{V}$ input for a fraction $D$ (the duty cycle) of each switching period, and a freewheeling diode clamps it to $0\text{V}$ the rest of the time (Chapter 5). So $V_m$ is a square wave between $12\text{V}$ and $0\text{V}$. In steady state the output inductor must have zero average voltage (otherwise its current would ramp without bound), so the average of $V_m$ appears at the output:

$$\boxed{{\displaystyle V_{\text{out}}=D{V}_{\text{in}}}}=(0.5)(12)=6\text{V}.$$

The L-C filter passes that average and attenuates the switching ripple. The inductor current ripple over one period follows from $v=Ldi/dt$ during the on-time $D{T}_{\text{sw}}$:

$$\mathrm{\Delta }{I}_L=\frac{(V_{\text{in}}-V_{\text{out}})D}{f_{\text{sw}}L}=\frac{(12-6)(0.5)}{(5000)(0.01)}=0.06\text{A}.$$

Run the buck and check all three predictions:

• Vout settles at about $5.99\text{V}$ — within $0.2\mathrm{\%}$ of the ideal $6\text{V}$ (the tiny shortfall is the IGBT and diode on-state drops).
• The inductor current IL averages about $0.30\text{A}$, exactly $V_{\text{out}}/R=6/20$.
• IL ripples about $61\text{mA}$ peak-to-peak, matching the $\mathrm{\Delta }{I}_L=60\text{mA}$ we just computed.

Change the duty reference and $V_{\text{out}}$ tracks it linearly — that proportional, adjustable output is the whole point of a buck.

7.4 Closing the loop: PWM power control

The converters above run open-loop: you set a duty and take whatever output results. The last sample closes the loop, and in doing so exercises every idea in Module 2 at once — a fitting capstone.

Open the PWM power controller in app →

(Full description: PWM power control.)

The goal is to hold the average power delivered to a $5\mathrm{\Omega }$ load from a $50\text{V}$ bus at a setpoint of $30$. Recall the loop from Chapter 4: the load voltage V_R and current I_R are multiplied to instantaneous power, low-pass filtered to P_avg, and compared with P_ref; the PI controller turns the resulting error into a PWM duty that gates the IGBT. Here is how Module 2's pieces show up:

• Source (Ch 4): the $50\text{V}$ bus, behind a small series resistance.
• Control domain (Ch 4): the setpoint, summer, PI, multiply, and filter blocks, discretized and solved alongside the network.
• Switch (Ch 5): the IGBT, gated by the PWM, with its two-state conductance.
• Numerics (Ch 6): a $1\mu \text{s}$ step resolves the switching so the measured power is meaningful.

Run it and plot error and P_avg: the PI raises the duty until P_avg reaches $30$, at which point error collapses toward zero and stays there. A PI controller drives its steady-state error to zero by construction — it keeps integrating any residual error into the duty until there is none left. That is closed-loop control riding on top of a switching converter, and it is exactly the machinery Module 5 will generalize to generator excitation and governors.

7.5 Summary

• A reservoir capacitor smooths a rectified waveform; the peak-to-peak ripple is roughly $\mathrm{\Delta }{V}_{\text{pp}}\approx V_{\text{dc}}/(R{f}_{\text{ripple}}C)$.
• A half-wave rectifier refreshes once per line cycle ($f_{\text{ripple}}=f$) and, with $\tau \approx T$, ripples heavily; a full bridge refreshes twice ($f_{\text{ripple}}=2f$) and, with $\tau \gg T$, is far flatter.
• A buck converter outputs $V_{\text{out}}=D{V}_{\text{in}}$ by inductor volt-second balance, with current ripple $\mathrm{\Delta }{I}_L=(V_{\text{in}}-V_{\text{out}})D/(f_{\text{sw}}L)$; the simulator confirms both to a fraction of a percent.
• Closing the loop with a PI controller holds an output at its setpoint by modulating the duty — combining the source, control, switch, and numerical machinery of the whole module.

7.6 Problems

Problem 7.1. In the half-wave rectifier you enlarge the reservoir capacitor from $100\mu \text{F}$ to $470\mu \text{F}$. Using $\mathrm{\Delta }{V}_{\text{pp}}\approx V_{\text{dc}}/(RfC)$ with $V_{\text{dc}}\approx 12\text{V}$, estimate the new ripple. Which way does the mean output move?

Solution 7.1

$\mathrm{\Delta }{V}_{\text{pp}}\approx 12/[(200)(60)(470\times {10}^{-6})]\approx 2.1\text{V}$ — roughly a factor of $4.7$ smaller than before, as expected since ripple $\propto 1/C$. With less sag between peaks, the mean output rises closer to the peak ($\approx 14\text{V}$). Bigger reservoir, flatter and higher DC — at the cost of larger peak charging currents.

Problem 7.2. The full-bridge output ripples at $120\text{Hz}$ while the half-wave ripples at $60\text{Hz}$, for the same $60\text{Hz}$ source. Why? Give two reasons the bridge output is smoother.

Solution 7.2

The bridge conducts on both half-cycles (one diagonal diode pair per half-cycle), so the load is refreshed twice per line period — hence $120\text{Hz}$. It is smoother because (1) the gap the capacitor must bridge is halved ($8.3\text{ms}$ vs $16.7\text{ms}$), and (2) $\mathrm{\Delta }{V}_{\text{pp}}\propto 1/f_{\text{ripple}}$, so doubling the ripple frequency halves the ripple for the same $R$ and $C$. (In the samples the bridge also uses a much larger $\tau$, compounding the effect.)

Problem 7.3. A buck converter runs from $V_{\text{in}}=48\text{V}$ and must produce $V_{\text{out}}=18\text{V}$. What duty cycle is required?

Solution 7.3

From $V_{\text{out}}=D{V}_{\text{in}}$: $D=V_{\text{out}}/V_{\text{in}}=18/48=0.375$. The IGBT is on for $37.5\mathrm{\%}$ of each switching period.

Problem 7.4. For the buck sample ($V_{\text{out}}\approx 6\text{V}$, $R=20\mathrm{\Omega }$), what average inductor current do you expect, and why does it equal the load current?

Solution 7.4

In steady state the capacitor carries no average current, so the entire average inductor current flows into the load: $⟨I_L⟩=V_{\text{out}}/R=6/20=0.30\text{A}$. This matches the simulator's reported average, and is why the inductor and load currents share the same DC value (they differ only by the small ripple the capacitor absorbs).

Problem 7.5. In the closed-loop PWM controller, explain why the PI drives the steady-state power error to zero, and what sets the final duty cycle.

Solution 7.5

The integral term of a PI controller keeps accumulating as long as any error remains, continuously adjusting the duty until the error is zero; only a zero-error condition leaves the integrator (and thus the duty) steady. The final duty is whatever value makes the delivered average power equal the setpoint for the given bus and load — the controller finds it automatically rather than it being dialed in by hand, which is the advantage of closed-loop operation over the fixed-duty buck of §7.3.

7.7 References

• N. Mohan, T. Undeland, and W. Robbins, Power Electronics: Converters, Applications, and Design, Wiley — rectifiers, DC-DC converters, and ripple analysis.
• H. W. Dommel, Electromagnetic Transients Program (EMTP) Theory Book, Bonneville Power Administration — the network solution with switching devices.
• J. Arrillaga and N. R. Watson, Power Systems Electromagnetic Transients Simulation, IET Power and Energy Series 39 — power-electronic systems and their EMT representation.

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Previous: Chapter 6 — Numerical issues of switching · Next: Module 3 — Transmission lines and cables.

You have completed Module 2. You can now model sources and control blocks, switching devices and their state logic, the numerical hazards of switching, and the rectifiers and converters that build on them — and check every result against a hand calculation.