Chapter 18 — Excitation systems and AVRs

A synchronous machine left to itself is a poor voltage source. Chapter 15 built its model with the field voltage $E_{fd}$ as an input — a number you typed in — and Chapter 16's lab held it fixed. Load the machine and its terminal voltage sags; unload it and the voltage rises; short it and the voltage collapses and stays collapsed. Every generator on every grid therefore carries an excitation system: a closed loop that measures terminal voltage, compares it with a set-point, and drives the field to hold it.

This chapter builds that loop. The models are not inventions — they are the standard block diagrams of IEEE Std 421.5, the recommended practice that lets a manufacturer publish a controller as a model type plus a table of numbers, and lets any simulator reproduce it. We work through the shared front-end that every model in the standard has in common, then the Type DC1A in full, then the Type AC4A as a contrasting fast regulator. The chapter closes on the question that decides whether your simulation is usable at all: how the controller finds the operating point it is supposed to be holding.

Learning objectives

By the end of this chapter you should be able to:

• Describe the common front-end of an excitation system — transducer, summing junction, reference — and name the auxiliary inputs that feed it.
• Explain what distinguishes the DC, AC and ST families by their source of excitation power.
• Trace the DC1A block diagram stage by stage and write the difference equation each stage becomes.
• Explain the role of exciter saturation and of rate feedback, and say what each one is worth zero at in steady state.
• Read the per-unit convention for field quantities and say what "1 pu $E_{fd}$" physically means.
• Explain why $V_{REF}$ is computed rather than typed, and predict what a mis-initialized exciter does at $t=0$.

18.1 What the loop is for

Start with the physics. A loaded synchronous machine's terminal voltage falls below its internal EMF by the drop across the synchronous reactance. Increase the load current and that drop grows; add a lagging (inductive) load and it grows faster still, because the armature reaction is then directly demagnetizing. Nothing about the machine resists this — it is the natural consequence of the model in Chapter 15.

The only lever available is the field current, and it is a powerful one: raising the field raises the internal EMF, which raises the terminal voltage back to where it belongs. An excitation system automates that lever. Its jobs, in order of importance:

1. Hold terminal voltage at a set-point through load changes.
2. Support the system during faults. When a nearby fault depresses the voltage, a good exciter drives the field hard — "field forcing" — which both sustains the voltage and, crucially, increases the synchronizing torque that keeps the machine from pulling out of step.
3. Respect limits. The field winding, the rotor and the exciter itself all have thermal and magnetic limits that the regulator must not exceed.

Point 2 is why excitation systems are modelled in such detail. The difference between a machine that rides through a fault and one that loses synchronism is often the ceiling voltage and the response speed of its exciter, and that difference shows up within the first few hundred milliseconds.

18.2 The common front-end

IEEE 421.5 organizes dozens of models around one shared structure. Whatever the model type, the input side looks the same.

The front-end common to every excitation-system model. Terminal voltage is filtered by the transducer $1/(1+s{T}_R)$ to give $V_C$, which is subtracted from the reference $V_{REF}$ at the summing junction. Auxiliary signals — the stabilizer $V_S$ and the limiters $V_{UEL}$ and $V_{OEL}$ — enter at the same junction, and the model-specific forward path turns the resulting error into field voltage $E_{FD}$.

Four pieces, each worth a sentence.

The transducer $1/(1+s{T}_R)$. Real regulators sense terminal voltage through a potential transformer and a rectifier-filter, which takes time. $T_R$ is typically 10 to 30 ms. Its output is conventionally called $V_C$, and in a model with load compensation it is the compensated voltage $|V_t+(R_c+j{X}_c)I_t|$ rather than $V_t$ itself. NumaSim's models default to no compensation, so $V_C$ is the filtered terminal voltage.

The summing junction. The error is $V_{REF}-V_C$, plus the auxiliary terms. Everything downstream acts on this one scalar.

The reference $V_{REF}$. This is the set-point, and §18.6 explains why it is computed for you rather than typed in.

The auxiliary inputs. $V_S$ comes from a power system stabilizer (Chapter 19), $V_{UEL}$ and $V_{OEL}$ from under- and over-excitation limiters. In NumaSim each is an optional port behind an enable toggle, off by default; disabled, the port disappears from the block and the term is zero. Enable one and the port appears, ready to be wired. The reason they exist from day one, even unused, is compatibility: a stabilizer built later drops onto an exciter built today with no changes to either.

The three families

What differs between models is where the excitation power comes from, and that dictates the shape of the forward path:

Clause	Family	Power source	Forward-path signature
6	Type DC	A DC commutator exciter on the shaft	A genuine exciter dynamic $1/(K_E+s{T}_E)$ with magnetic saturation
7	Type AC	An alternator plus rectifiers	Exciter dynamic plus rectifier regulation and armature demagnetization
8	Type ST	A transformer fed from the terminals, rectified	No rotating exciter at all; limits proportional to $V_t$

DC systems are the oldest and the slowest — a rotating DC machine has real inertia in its field circuit, and $T_E$ of half a second is typical. Static (ST) systems are the fastest, since a controlled rectifier can change its output within a cycle, but they have a weakness: their power comes from the machine's own terminals, so a fault that collapses the terminal voltage also collapses the exciter's supply. AC systems sit in between.

18.3 The Type DC1A in detail

The DC1A represents a field-controlled DC commutator exciter with a continuously acting voltage regulator. It is the model to learn first, because it contains every feature the others recombine.

The Type DC1A. The transducer feeds a summing junction against $V_{REF}$ and the rate-feedback signal $V_F$; a lead-lag provides transient gain reduction; the amplifier $K_A/(1+s{T}_A)$ is limited to $[V_{RMIN},V_{RMAX}]$; the exciter integrates $V_R$ against its own loading $(K_E+S_E(E_{FD}))E_{FD}$; and the rate feedback $s{K}_F/(1+s{T}_F)$ returns from the output to the summing junction.

Walk it stage by stage. Every one becomes a forward-Euler update of the kind Chapter 17 derived, and I give each so you can hand-check a run.

Transducer. $V_C$ tracks $V_t$ through the lag:

$$V_{C,n}=V_{C,n-1}+\frac{\mathrm{\Delta }t}{T_R}(V_{t,n}-V_{C,n-1}).$$

With $T_R=0$ the block vanishes and $V_C=V_t$ directly, per the zero-parameter convention of §17.2.

Summing junction. $e=V_{REF}-V_C+V_S+V_{UEL}+V_{OEL}-V_F$. Note the sign on the rate feedback: it opposes changes in the output.

Lead-lag $(1+s{T}_C)/(1+s{T}_B)$ — transient gain reduction. This is a stability device, and it is worth understanding why it is there. A high regulator gain $K_A$ is what gives good steady-state voltage regulation, but the same high gain around a loop with the exciter's long time constant is destabilizing. The lead-lag lets you have both: its DC gain is exactly 1, so the steady-state regulation is untouched, but for fast changes the gain is reduced by $T_C/T_B$. Manufacturers who do not use it publish $T_B=T_C=0$, and the stage disappears.

Amplifier $K_A/(1+s{T}_A)$ with a non-windup limit. The main regulator gain, typically 20 to 400. Its output $V_R$ is clamped to $[V_{RMIN},V_{RMAX}]$ — and importantly, the state is clamped, not just the value read out. That is what "non-windup" means: when the regulator is driven hard into its ceiling, it comes off the ceiling the instant the error reverses, instead of first having to unwind an accumulated excess. A windup limiter in this position would make post-fault recovery visibly sluggish.

The exciter. This is the DC machine itself:

$$T_E\frac{d{E}_{FD}}{dt}=V_R-(K_E+S_E(E_{FD}))E_{FD}.$$

The term $V_{FE}=(K_E+S_E)E_{FD}$ is the exciter's own field loading, and in steady state $V_R$ exactly balances it. $K_E$ is the self-excitation constant — $K_E=1$ for a separately-excited exciter, and can be small or slightly negative for a self-excited one.

Exciter saturation $S_E(E_{FD})$. An exciter's iron saturates, so producing more output takes disproportionately more field. The standard captures this with two points read off the exciter's open-circuit saturation curve, and NumaSim fits the quadratic (Schultz) form through them:

$$S_E(E)=\frac{B(E-A{)}^2}{E}\text{for }E>A,0\text{ otherwise.}$$

You supply $(E_1,S_E(E_1))$ and $(E_2,S_E(E_2))$ — defaults 3.1/0.33 and 2.3/0.10 — and the coefficients $A$ and $B$ are solved for once at start-up. If the two points are degenerate or saturation is switched off, $S_E\equiv 0$ and the exciter is linear.

Rate feedback $s{K}_F/(1+s{T}_F)$. A washout, or derivative-with-a-filter. It responds to how fast $E_{FD}$ is changing, not to its value, so its steady- state output is exactly zero and it does not disturb the regulation at all. Its job is purely dynamic: damping. Without it, the high-gain regulator wrapped around the slow exciter lag tends to overshoot and oscillate. In the engine it is realized as $V_F=(K_F/T_F)(E_{FD}-w)$ with $w$ lagging $E_{FD}$, which makes the "zero at steady state" property exact rather than approximate — as $w\to E_{FD}$, $V_F\to 0$.

Two things that are zero at steady state

It is worth pausing on this, because it recurs throughout Module 5. Both the rate feedback here and the stabilizer of Chapter 19 are built on washouts, and both are designed to contribute nothing in steady state. That is what lets you add them to a tuned loop without shifting its operating point: they change how the machine gets somewhere, never where it ends up.

18.4 The Type AC4A, and an honest note about it

The AC4A is a high-initial-response alternator-rectifier system. Structurally it is much simpler than the DC1A: there is no rotating-exciter integrator and no saturation, because the model treats the whole excitation chain as fast enough that the regulator output is the field voltage. The forward path is an input limiter, a lead-lag, and an amplifier:

$$V_C\to e=V_{REF}-V_C\to \text{clamp}[V_{IMIN},V_{IMAX}]\to \frac{1+s{T}_C}{1+s{T}_B}\to \frac{K_A}{1+s{T}_A}\to E_{FD}.$$

Two details distinguish it from a naive "fast DC1A":

The input limiter comes first. $[V_{IMIN},V_{IMAX}]$ clamps the error before it reaches the lead-lag, at $\pm 10$ pu by default. This bounds how hard the transient-gain-reduction stage can be driven by a large disturbance, which matters when the default $T_B=10$ s, $T_C=1$ s gives a transient gain reduction of a factor of ten.

The ceiling depends on field current. The upper limit on $E_{FD}$ is not a constant but $V_{RMAX}-K_C{I}_{fd}$, where $K_C$ is the rectifier loading factor. This is the model's nod to rectifier commutation: drawing more field current increases the commutating overlap and reduces the maximum voltage the rectifier bridge can deliver. With the default $K_C=0$ the effect is off and the Ifd port does not even appear on the block; set $K_C$ non-zero and the port appears for you to wire from the machine.

What NumaSim's AC4A does not include

IEEE 421.5 Annex D defines a three-segment rectifier regulation curve$F_{EX}(I_N)$, with $I_N=K_C{I}_{fd}/V_E$, and the full AC-family models apply it as $E_{FD}=V_E\cdot F_{EX}(I_N)$. NumaSim's AC4A implements only the linear ceiling reduction $V_{RMAX}-K_C{I}_{fd}$, not the piecewise curve, and it has no separate exciter output $V_E$ to apply the curve to.

For most studies this is immaterial — the AC4A is a high-response model whose behaviour is dominated by $K_A$, $T_A$ and the ceilings, and the default $K_C=0$ removes the term entirely. It matters if you are specifically studying an alternator-rectifier exciter operating deep into commutation with a heavily loaded field. If that is your study, use the DC1A with representative parameters, or check the component reference for AC-family models added since this chapter was written.

Compare the defaults and the difference in intent is obvious: the DC1A ships with $K_A=46$ and $T_A=60$ ms against an exciter time constant of 460 ms; the AC4A ships with $K_A=200$ and $T_A=15$ ms and no exciter lag at all. One is a rotating machine being coaxed; the other is a fast electronic regulator.

18.5 The machine interface and per-unit

The exciter and the machine exchange ordinary control signals over wires. The synchronous machine publishes four control outputs and accepts two inputs:

Machine port	Direction	Meaning
Vt	out	Terminal-voltage magnitude, pu — the AVR's primary feedback
Ifd	out	Field current, pu on the exciter base
speed	out	Rotor speed $\omega$, pu — used by governors and stabilizers
Pe	out	Electrical power, pu on the machine base, generator convention
Efd	in	Field voltage from the exciter
Tm	in	Mechanical torque from the governor (Chapter 19)

So the standard AVR wiring is exactly two connections: machine Vt into exciter Vt, exciter EFD back into machine Efd. Everything else is optional.

Both of those are cross-domain connections, so by §17.4 each costs one time step and the loop's round trip is two. Against exciter time constants measured in hundreds of milliseconds, this is nothing — but it is the reason the loop sorts without an algebraic-loop warning.

The non-reciprocal per-unit system

Field quantities need a base, and the excitation world uses a convention worth stating plainly, because it is not the one you would guess.

1.0 pu $E_{FD}$ is the field voltage that produces rated terminal voltage at no load, on the air-gap line.

That is the non-reciprocal system of IEEE 421.5 Annex B. Its virtue is that a machine sitting on open circuit at rated voltage has $E_{FD}=1.0$ and $V_t=1.0$, so the AVR's error is naturally near zero at 1 pu and every gain, limit and saturation factor lives on a comparable scale. It is not the same as the reciprocal (Park) per-unit system used inside the machine equations, and the machine model converts between them internally. Ifd is published on the matching exciter base, so on open circuit $I_{fd}\approx E_{FD}$.

When you read that a machine's ceiling is "5 pu", this is the base being used: five times the field voltage needed for rated open-circuit terminal voltage.

18.6 Initialization: why $V_{REF}$ is computed, not typed

Here is a question with a surprisingly consequential answer. You have a machine running at 40 MW into a bus at 1.0 pu, and you attach a DC1A. What should $V_{REF}$ be?

Naively, 1.0 — you want 1 pu terminal voltage. But look at the steady-state summing junction. In equilibrium the regulator output must balance the exciter loading, $V_R=(K_E+S_E(E_{FD}))E_{FD}$, and the regulator has finite gain, so the error cannot be zero:

$$e=\frac{V_R}{K_A}⟹V_{REF}=\frac{V_R}{K_A}+V_C.$$

With $K_A=46$ and $V_R$ around 1.3, the required error is about 0.028 pu. Type $V_{REF}=1.0$ and the regulator starts out believing the voltage is 0.028 pu too high, drives the field down, and the machine departs from the operating point you carefully solved for. This is the classic startup transient: it is not a numerical artifact, it is the model faithfully simulating a regulator that disagrees with its plant.

Worse, the size of the disagreement depends on $K_A$, $K_E$, saturation and the loading — so there is no single number you could sensibly ask a user to type.

NumaSim therefore back-calculates it. When you run a power flow, the apply pass traces the exciter's EFD output through the circuit to find the machine it drives, re-derives that machine's operating point from the bus solution, and walks the DC1A block diagram backwards with every derivative set to zero:

$$\begin{array}{rlrl}{E}_{FD}& =E_F& & \text{(the machine’s field voltage at the operating point)}\\ V_C& =V_t& & \text{(the transducer has unity DC gain)}\\ V_{FE}& =(K_E+S_E(E_{FD}))E_{FD}& & \text{(exciter integrator in balance)}\\ V_R& =\mathrm{clamp}(V_{FE},V_{RMIN},V_{RMAX})& & \\ V_F& =0& & \text{(the rate feedback is a washout)}\\ V_{REF}& =V_R/K_A+V_t& & \text{(closes the summing junction)}\end{array}$$

Those values are written onto the exciter as initialization parameters, and the C++ model seeds each of its integrator states from them on the first step. The loop then starts in balance: every derivative is zero, so nothing moves until a disturbance arrives.

Three practical consequences:

• Run the power flow before the transient. Without it the exciter falls back to its defaults ($V_{REF}=1$, $E_{FD}(0)=1$) and you get the startup transient described above.
• Wire the exciter directly to one machine. The pairing is traced through the resolved connection graph, so a Go-To/From label works exactly like a wire. But an intermediate block between EFD and the machine's Efd, or fan-out to two machines, makes the pairing ambiguous — the recipe warns and skips rather than guessing.
• A skipped initialization is loud, not silent. Check the warnings after applying a power flow; "does not drive a synchronous machine" means the trace failed and your run will start with a transient.

18.7 Lab: watch an AVR ride through a fault

Open the generator controls disturbance in simulator →

(Full description: generator controls disturbance.)

A 100 MVA machine on a 13.8 kV bus, with a DC1A exciter and a governor (Chapter 19), takes a bolted three-phase fault at $t=4$ s that clears 100 ms later. Plot VC and EFD together, with Pgen underneath.

Before the fault. VC sits between 0.99 and 1.02 pu and EFD drifts gently between 0.98 and 1.30 pu as the field flux finishes settling. This is what a correctly initialized loop looks like: no lurch at $t=0$, just slow residual motion. Note that EFD is not 1.0 — a loaded machine needs more field than an open-circuited one, and 1.3 pu is the price of 40 MW at 1 pu terminal voltage.

During the fault. Terminal voltage collapses from 0.99 to 0.048 pu. The regulator sees an enormous error and does exactly what it is built to do: it drives EFD from 1.30 up to 2.41 pu. Look at where it stops — well short of the $V_{RMAX}=5$ ceiling. The exciter is not saturated; it is limited by its own time constant $T_E=0.46$ s, which cannot slew the field voltage any faster in 100 ms. This is the single most important thing to see in this lab: for a short fault, a DC exciter's response is dominated by $T_E$, not by its ceiling.

After clearing. The boosted field pulls the voltage back fast — 0.82 pu within 50 ms, 0.97 pu by 4.3 s, on setpoint by 6 s — and the rotor takes one swing to 32.4° before settling at 29.1°, without pole-slipping.

Then experiment. Cut KA from 46 to a handful and re-run: the recovery becomes visibly sluggish, and the steady-state voltage error grows, because a smaller $K_A$ needs a bigger error to produce the same $V_R$. Stretch fault_duration from 100 ms through 200, 300 and 400 ms and watch the first swing grow — 37.7°, 54°, 78° — a direct read on how much margin the machine has before it loses synchronism, and on how much of that margin the exciter is buying.

18.8 Summary

• An excitation system holds terminal voltage, forces the field during faults to preserve synchronism, and respects the machine's limits.
• Every IEEE 421.5 model shares a front-end: transducer $1/(1+s{T}_R)$ producing $V_C$, a summing junction against $V_{REF}$, and optional $V_S$ / $V_{UEL}$ / $V_{OEL}$ auxiliary inputs.
• The families differ by excitation power source — DC (commutator exciter, slow, with a real $1/(K_E+s{T}_E)$ dynamic and saturation), AC (alternator-rectifier), ST (transformer-fed, fastest, but its supply collapses with the terminal voltage).
• In the DC1A, the lead-lag gives transient gain reduction with unity DC gain, the amplifier limit is non-windup, the exciter integrates $V_R-(K_E+S_E)E_{FD}$, and the rate feedback is a washout that is zero in steady state.
• NumaSim's AC4A is a fast regulator with no exciter integrator and no saturation; it models rectifier loading as a linear ceiling reduction $V_{RMAX}-K_C{I}_{fd}$ rather than the standard's $F_{EX}$ curve.
• Field quantities use the non-reciprocal per unit: 1 pu $E_{FD}$ produces rated terminal voltage at no load.
• $V_{REF}$ is back-calculated from the load-flow operating point, because a finite-gain regulator needs a non-zero steady-state error. Skip the power flow, or break the exciter-to-machine trace, and the run begins with a startup transient.

18.9 Problems

Problem 18.1. A DC1A has $K_A=46$, $K_E=1$, and saturation disabled. At the operating point the machine needs $E_{FD}=1.3$ pu with $V_t=1.0$ pu. Compute $V_R$, the steady-state error, and $V_{REF}$. Then repeat with $K_A=400$ and comment.

Solution 18.1

With saturation off, $V_{FE}=(K_E+0)E_{FD}=1.3$, so $V_R=1.3$ pu (inside the $\pm 5$ limits). The steady-state error is $e=V_R/K_A=1.3/46=0.0283$ pu, and $V_{REF}=e+V_C=0.0283+1.0=1.0283$ pu.

With $K_A=400$: $e=1.3/400=0.00325$ pu and $V_{REF}=1.00325$ pu.

The higher gain needs a much smaller error to produce the same field voltage, which is precisely what "good voltage regulation" means — the terminal voltage tracks the reference more closely across the load range. The cost is stability margin, which is why a high-gain regulator is usually paired with transient gain reduction.

Problem 18.2. In the same DC1A, saturation is enabled with the default points and the fitted curve gives $S_E(1.3)=0.05$. Recompute $V_R$ and $V_{REF}$ with $K_A=46$. Why does saturation raise the required $V_{REF}$?

Solution 18.2

Now $V_{FE}=(K_E+S_E)E_{FD}=(1+0.05)(1.3)=1.365$, so $V_R=1.365$, $e=1.365/46=0.0297$, and $V_{REF}=1.0297$ pu.

Saturation means the exciter's iron needs extra drive to produce the same output voltage. The regulator has to supply that extra drive, so $V_R$ rises; with finite gain, a larger $V_R$ requires a larger error; and a larger error requires a higher reference to sit at the same terminal voltage. This is exactly why the initialization must know about saturation — the correct $V_{REF}$ is not a property of the set-point alone.

Problem 18.3. Explain why the rate feedback $s{K}_F/(1+s{T}_F)$ can be added to a tuned loop without changing the steady-state terminal voltage, while increasing $K_A$ cannot.

Solution 18.3

The rate feedback is a washout: its transfer function has a zero at $s=0$, so its DC gain is zero and its steady-state output is $V_F=0$. It contributes nothing to the summing junction in equilibrium, so the steady-state balance $V_{REF}=V_R/K_A+V_C$ is untouched. It only acts while $E_{FD}$ is moving, which is exactly when damping is wanted.

$K_A$ appears directly in that steady-state balance. Changing it changes the error needed to sustain a given $V_R$, so at a fixed $V_{REF}$ the terminal voltage shifts. (Equivalently: the initialization has to recompute $V_{REF}$ whenever you change $K_A$, and it does.)

Problem 18.4. During the fault in Lab 18.7, EFD rises only to 2.41 pu although $V_{RMAX}=5$. Give the reason, and describe two changes that would each let it reach a higher value within the same 100 ms.

Solution 18.4

The limit is not the ceiling; it is the exciter time constant. $E_{FD}$ is the output of $1/(s{T}_E)$ with $T_E=0.46$ s, so in 100 ms the field voltage can only move about $(0.1/0.46)$ of the way toward the value $V_R$ is calling for. The regulator saturates its own output long before the exciter can follow.

Two changes that would raise the achieved value: reduce $T_E$, which is physically the same as choosing a faster exciter (an AC or ST system rather than a DC commutator one); or lengthen the fault, giving the exciter more time to integrate. Raising $V_{RMAX}$ would not help at all, since the ceiling is not what is binding.

Problem 18.5. An engineer sets $V_{REF}$ by hand to 1.0 on a machine whose correct value is 1.0283, then runs a transient without a power flow. Describe what the first second of the run looks like, and how you would recognize this mistake from the plots alone.

Solution 18.5

The regulator starts believing the terminal voltage is 0.0283 pu too high. It drives $V_R$ down, the exciter integrates the reduced drive, $E_{FD}$ falls, and the terminal voltage follows it down until the error is consumed — a slow, smooth droop over several exciter time constants, possibly with an overshoot and a settling oscillation depending on the damping.

The tell is that the transient occurs with no disturbance applied. Any excursion in the first second of a run in which nothing was switched, faulted or stepped is an initialization problem, not physics. Confirm it by checking whether the terminal voltage settles at a value different from the load-flow solution — a correctly initialized run should be visually flat until the first event.

Problem 18.6. You wire an exciter's EFD output into a gain block set to 1.0, and the gain's output into the machine's Efd. Electrically this is identical to a direct wire. What happens to the auto-initialization, and why?

Solution 18.6

It fails, with a warning that the drive output "does not drive a synchronous machine", and the exciter falls back to its defaults.

The pairing is resolved by tracing the exciter's EFD output through the connection graph to find components that consume it. With a gain block in the path, the direct consumer of EFD is the gain, not the machine — and the resolver deliberately refuses to walk through intermediate blocks, because in general it cannot know what an arbitrary block does to the signal and therefore cannot invert it. A unity gain is invertible; a limiter or a nonlinearity is not, and guessing would be worse than skipping.

The fix is a direct wire, or a Go-To/From label pair — labels are collapsed by the same net resolution that handles wires, so they trace cleanly.

18.10 References

• IEEE Std 421.5, IEEE Recommended Practice for Excitation System Models for Power System Stability Studies — the source of every model in this chapter; Clause 6 for the DC family, Clause 7 for AC, Annex B for the per-unit system, Annex D for the rectifier regulation curve, Annex H for sample data.
• P. Kundur, Power System Stability and Control, McGraw-Hill, Chapter 8 — excitation systems, their effect on stability, and the role of transient gain reduction.
• IEEE Std 421.1, IEEE Standard Definitions for Excitation Systems for Synchronous Machines — terminology, ceiling voltage, response ratio.
• J. Arrillaga and N. R. Watson, Power Systems Electromagnetic Transients Simulation, IET Power and Energy Series 39 — machine controls in an EMT context and steady-state initialization.

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